Edge AI and Vision
Autonomous driving, industrial defect detection, semantic video retrieval, and practical computer vision pipelines for constrained devices.
Embedded AI and hardware systems
Chip Pursuit Lab
We are a student-led engineering team formed by UESTC and University of Glasgow Electronic Information Engineering graduates, building deployable projects across computer vision, RISC-V platforms, FPGA acceleration, and embedded Linux systems.
Research Direction
Embedded AI from algorithms to hardware.
RISC-V and Embedded Systems
Cross-compilation toolchains, embedded Linux integration, real-time communication, and low-level performance debugging on heterogeneous platforms.
AI Hardware Acceleration
FPGA and RTL accelerator design for CNNs, keyword spotting, and the group's ongoing AICAS 2026-oriented ViT acceleration work.
People
Members
Research lead
Chuqi Zhao
M.S. student in Electrical and Computer Engineering at Vanderbilt University, supported by a tuition scholarship, with a BEng in Electronic Information Engineering from UESTC and the University of Glasgow.
Research member
Sun Yucheng
Master's student at UESTC's School of Information and Communication Engineering, Qingshuihe Campus, with a BEng in Electronic Information Engineering from UESTC and the University of Glasgow.
AI hardware researcher
Tang Ruiqi
M.S. student in Electronic Science and Technology at Fudan University, with a BEng in Electronic Information Engineering from UESTC and the University of Glasgow. Focuses on efficient AI hardware.
- Currently working on FPGA-based ViT acceleration for AICAS 2026.
- Co-first author of an accepted ViT Token Merging accelerator paper.
- Builds FPGA and RTL accelerators for CNNs and edge keyword spotting.
- Experienced in SoC verification tooling, Verilog/SystemVerilog, and EDA flows.
Research member
Guo Yuqi
Master's student at UESTC's School of Electronic Science and Engineering, Qingshuihe Campus, with a BEng in Electronic Information Engineering from UESTC and the University of Glasgow.
Pet member
CowCat
Resident morale officer and unofficial review committee, known for strict standards on comfort, curiosity, and nap scheduling.
Current Work
In progress
FPGA-Based ViT Acceleration for AICAS 2026
The team is currently exploring FPGA acceleration for Vision Transformer inference. This is active work in progress, not a published result.
Team Work
Projects
Autonomous Driving System Optimization
Deployed and optimized a simulated urban autonomous driving system on a RISC-V platform, with OpenCV cross-compilation, YOLOv5 training on COCO, and INT8 quantization.
- Improved recognition speed by 80% and accuracy by 30%.
- Reduced average CPU usage from 96% to 50%.
- Used Git to coordinate development, debugging, and releases.
Autonomous Robot Vehicle in a Miniature City
Built a distributed multi-MPU embedded system with Ethernet-based communication for real-time data exchange and task coordination.
- Developed x86-RISC-V and ARM-RISC-V cross-compilation flows.
- Debugged embedded Linux modules with gdb, perf, and dmesg.
Semantic Video Retrieval System
Designed a surveillance video retrieval pipeline with KCF tracking, FCNN-based semantic event classification, MySQL event tagging, and MQTT communication between Hi3861 and Hi3516DV300.
Industrial Defect Detection with OpenCV
Developed image-processing algorithms to locate surface defects in thermal insulation materials using edge detection and region segmentation.
Hand Gesture Controlled Car
Integrated LiDAR obstacle avoidance, VR headset gyroscope data, camera control, and gesture recognition for multimodal navigation.
Recognition
CNIPA patent application for a communication signal modulation recognition system and method, plus UESTC course-project and graduation awards.
Highlights
Results
01
Autonomous Driving Optimization
Recognition speed improved by 80%, accuracy by 30%, and average CPU usage fell from 96% to 50%.
02
Accepted ViT Accelerator Paper
Tang Ruiqi co-authored a hardware architecture for efficient ViT Token Merging.
03
Patent and Awards
Recognition includes a CNIPA patent application and UESTC project and graduation awards.
Project portfolio online
This site collects the group's members, project work, academic highlights, and technical direction in one public place.
Deeper project pages
Add paper pages, accelerator demos, benchmark tables, hardware photos, and reproducible notes as the portfolio grows.
Collaboration
Research, prototype, measure.
Chip Pursuit Lab welcomes collaborations around embedded AI, RISC-V systems, computer vision, FPGA acceleration, and measurable engineering prototypes.